Author:
Müller Johannes,Polakowski Patrick,Paul Jan,Riedel Stefan,Hoffmann Raik,Drescher Maximilian,Slesazeck Stefan,Müller Stefan,Mulaosmanovic Halid,Schröder Uwe,Mikolajick Thomas,Flachowsky Stefan,Erben Elke,Smith Elliot,Binder Robert,Triyoso Dina,Metzger Joachim,Kolodinski Sabine
Abstract
One of the key challenges in the development of embedded memory solutions is to ensure their compatibility to CMOS processing and to reduce the added complexity to a minimum. Especially the parallel implementation of charge based one-transistor memories in the FEoL, such as e.g. floating gate devices, together with advanced transistor technologies proves rather challenging. In contrast to that, an alternative one-transistor memory concept based on ferroelectric hafnium oxide closely resembles state of the art high-k metal gate devices and therewith promises a greatly simplified integration. Here we investigate the impact of strain, thermal budget and work function engineering, usually applied to high-k metal gate technologies, on material properties as well as on the memory performance of hafnium oxide based ferroelectric field effect transistors. Key challenges related to a modified gate etch and the integration of different hafnium oxide thicknesses will be discussed.
Publisher
The Electrochemical Society
Cited by
17 articles.
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