Monolithic Microphotonic Integration on the Silicon Platform

Abstract

Photonic integration in ULSI electronic circuits contributes three new functionalities that are critical to performance scaling: i) power efficient, global interconnection, ii) high bandwidth density chip-chip communication, and iii) optical signal processing. With the transition to parallel chip architectures, efficient communication among processing nodes can become a limiting factor to both programming and performance. A photonic communication layer can provide distance independent, low latency interconnection with efficient broadcast capability. On-chip photonic signal channels can provide wavelength division multiplexed, photonic pins with >100x improvement in I/O bandwidth density over ball grid arrays. Monolithic integration of these capabilities in the CMOS process flow can be achieved with Ge active devices (photodetectors, modulators, lasers) and Si/SiON passive components (waveguides, resonators, couplers). Process integration can be achieved with both FEOL and BEOL strategies.