Author:
Fitzgerald Eugene A,Lee K.E.,Yoon Soon-Fatt,Chua S.J.,Tan Chuan Seng,Ng G.I.,Zhou X.,Gong Xiao,Chang J.S.,Peh L.S.,Boon C.C.,Antoniadis D.a.,Yadav Sachin,Nguyen X.S.,Kohen D.a.,Kumar Annie,Zhang Li,Lee Kwang Hong,Liu Z.H.,Chain S.B.,Ge T,Choi P.
Abstract
We have established new methodologies, materials, processing, devices, and circuits for integrating III-V devices monolithically into CMOS circuits. Certain constraints were applied on this research from the start in order to converge on viable commercial strategies as the research moves closer to a path for new innovation in the semiconductor industry. Integration technology has been established for incorporating HEMTs and LEDs into CMOS integrated circuits, and both nitride-based and arsenic-phosphide-based materials are currently supported. Device models are inserted into standard foundry design libraries, allowing silicon technology efficiencies such as exploring various circuit designs before final physical silicon and fabrication-test feedback loops using test chip designs.
Publisher
The Electrochemical Society
Cited by
12 articles.
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