Author:
Wajda Cory,Leusink Gert,Akiyama Koji,Ashigaki Shigeo,Aoyama Shintaro,Shimomura Kouji,Aruga Miki,Takahashi Tsuyoshi,Yamazaki Kazuyoshi,Yamasaki Hideaki
Abstract
Material interactions in advanced high-κ / metal gate stacks can have a significant effect of the performance of completed devices. The effect of these interactions was investigated using planar MOS capacitor stacks that might be used for the gate of a MOS transistor. Gate electrode materials included TaN, TaSiN, and W, and HfSiO and HfSiON were used as the gate dielectric materials with an ultra-thin SiO2 interface between the silicon substrate and the dielectric. Deposition methods included CVD and ALD.
Publisher
The Electrochemical Society
Cited by
3 articles.
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