Author:
Judong Fabienne,Depoyan Linda,Hotellier Nicolas,Baudrier Martial,Bouillon Pierre
Abstract
While most of the SiO2 etch processes for microelectronics focus on very small dimensions, some specific embedded applications require thick oxide etching. For the purpose of a thick damascene copper layer, the morphological properties of a C5F8 (octafluorocyclopentene)/O2/Ar chemistry is investigated on a MERIE reactor by means of a Design of Experiment (DOE). Some experiments present 2 distinct etch states, inducing sloping profile on top of the trench and straighter profile on bottom of the trench. Polymer deposition on the photoresist sides and on the oxide walls is faster than polymer consumption by bombardment. A very simple model is issued for RIE-lag adjustment between small and large areas through the mean of residence time, thus allowing a fine depth tuning for both trenches and pads patterning.
Publisher
The Electrochemical Society
Cited by
1 articles.
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