Deterministic Assembly of In0.53Ga0.47As p+-i-n+ Nanowire Junctions for Tunnel Transistors
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Published:2012-04-27
Issue:4
Volume:45
Page:129-136
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ISSN:1938-5862
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Container-title:ECS Transactions
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language:
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Short-container-title:ECS Trans.
Author:
Kuo Meng-Wei,Li Jie,Liu Huichu,Vallett Aaron,Mohata Dheeraj Kumar,Datta Suman,Mayer Theresa S.
Abstract
Electric-field-assisted deterministic assembly is used to position arrays of p+-i-n+ In0.53Ga0.47As nanowires on a Si substrate for de-vice integration. Forces induced on the solution-suspended wires by a spatially varying, nonuniform electric field determines the po-sition of each wire with respect to lithographic features on the sub-strate. The electrical properties of the sub-50 nm diameter In0.53Ga0.47As junctions with a 100 nm thick unintentionally doped channel were characterized after adding source and drain contacts. The junctions showed clear rectification, with a forward bias ideal-ity factors as low as 1.8, and reverse leakage current as small as 20 pA at a -1 V bias. This represents an important step towards demonstrating an In0.53Ga0.47As-based nanowire tunnel transistor.
Publisher
The Electrochemical Society