0.18 Micron BiCMOS Process with Novel Structure SiGeC HBT

Abstract

This paper reports a manufacturable process of 0.18 micron SiGe BiCMOS integrating novel structure SiGe HBTs and 0.18 micron foundry-compatible CMOS devices. N-type SiGe HBT is newly designed by removing deep trench isolation, N+ sink collector pick-up and collector epitaxial growth. Instead, junction isolation, collector pick-up of deep contact through field oxide and implanted collector are used in SiGe HBT. The peak fT and fmax of N-type high speed SiGe HBT are 120GHz and 110GHz, respectively and the size of SiGe HBT is only half as conventional one. CMOS front-end process steps except P+ source/drain implants and RTA are prior to that of SiGe HBTs to minimize the impact of CMOS thermal budgets on SiGe HBT.