Vertically and Laterally Self-Aligned Double-Layer of Nanocrystals in Nanopatterned Dielectric Layer for Nanocrystal Floating Gate Memory Device

Abstract

The formation of vertically and laterally self-aligned double-layer of CdSe colloidal nanocrystals (NCs) in nanopatterned dielectric layer on Si substrate was demonstrated by repeating dip-coating process for NC deposition and atomic layer deposition (ALD) of Al2O3 layer. A nanopatterned-SiO2/Si substrate was formed by patterning with self-assembled diblock copolymer. After the selective deposition of the 1st NC layer inside SiO2 nanopattern by dip-coating, an Al2O3 interdielectric layer and the 2nd NC layer in Al2O3 nanopattern were sequentially deposited. The capacitance-voltage measurement of Al-gate/ALD-Al2O3(25nm)/2nd-CdSe-NCs/ALD-Al2O3(2nm)/1st-CdSe-NCs/nanopatterned-SiO2(15nm) /p-Si substrate structure showed the flatband voltage shift resulting from the charging of NCs.