NiSi Roughness on Embedded SiGe

Abstract

In this paper, the effects of Si capping and of Ge pre- amorphization (PAI) on embedded SiGe (eSiGe) and its influence on NiSi interface roughness are investigated. TEM and EDX analysis show that NiSi on eSiGe produces a very rough interface and a void-like Ni deficient area. In-situ Si capping of about 20nm thickness can effectively remove the void-like Ni deficient area on eSiGe, but it still shows the rough interface. Rs and Jlkg measurements do not clearly show the difference compared to non Si capping. However Si capping combined with Ge PAI can remove the Ni deficient area and produce a smooth interface, tightened Rs distribution, and about 100 times reduced junction leakage current. So Si capping combined with Ge PAI is very beneficial for NiSi roughness improvement on eSiGe.