Abstract
Gallium Nitride (GaN) power transistors are fast-emerging as viable candidates for efficient electrical power amplification. Two simple and reasonably accurate circuit simulation models are presented for GaN RF depletion-mode power transistors. In the first model, a SPICE LEVEL-1 MOS transistor is used to model the intrinsic transistor, and bias-dependent inter-electrode capacitances are modeled as simple diode junction capacitances; the series resistance between the drain and source electrodes is attached externally to the intrinsic transistor. In the second model, the GaN depletion-mode RF transistor is modeled using two SPICE LEVEL-2 MESFETs where the second MESFET is used in series with the drain of the first MESFET to model the gain compression at high values of drain currents; constant values of inter electrode capacitances are used. Both circuit simulation models are validated for DC and S-parameter performance from 100 MHz - 3 GHz.
Publisher
The Electrochemical Society