UTBOX SOI Devices with High-k Gate Dielectric Under Analog Perfomance

Abstract

This work presents an experimental analysis of the analog performance of UTBOX SOI devices with 20 nm silicon film thickness, 10 nm buried oxide thickness and different gate dielectrics. It was observed that a high-k gate dielectric can achieve a larger intrinsic voltage gain and Early voltage. These devices, however, have a larger low frequency noise, reduced linearity and higher GIDL current.