Characterization of Stress Transfer from Process Induced Stressor Layer to Substrate in MOSFETs

Abstract

The performance of electronic devices can be improved by applying stress to conduction channel to increase the carrier mobility. This can be achieved using contact etch stop layer (CESL). Its intrinsic stress is transmitted into the silicon substrate, inducing a strain in the conduction channel. This phenomenon results in an enhancement of about 8 % to 10 % of the channel electrical conductivity. Several techniques exist to characterize the stress. Currently, to obtain a high spatial resolution, the only possible solution to characterize the stress is to use TEM-based techniques. Dark-field electron holography has the advantage of producing strain maps that combine a nanometre-scale spatial resolution, a high sensitivity and a large field of view. As a consequence, this technique is employed in this paper to observe the deformation of silicon crystalline lattice in the transistor conduction channel.