Interconnect Technologies and Advanced Packaging for High Performance Computing

Abstract

The quest for high speed data processing continues to drive the industry to increase L1 and L2 on -chip caches and near-processor memories in large-scale computer systems. However, the increased latency and process yields limit chip area for L1 and L2 caches. Therefore alternative solutions beyond on-chip memory are being aggressively pursued. In this paper a high-level computer memory hierarchy and the corresponding interconnect technologies on each level of memory structures are summarized. We introduce a new MCM package technology based on proximity communication (PxC-MCM package) and discuss its merits compared to conventional MCM. Challenges and recent research results on PxC-MCM solution are presented as well.