Low-Frequency-Noise-Based Oxide Trap Profiling in Replacement High-k/Metal-Gate pMOSFETs

Abstract

Low-frequency noise is studied in planar high-k-metal/gate (HKMG) last pMOSFETs in order to study the impact of a post-HfO2 deposition SF6-plasma or heat treatment on the oxide trap density and profile. It is shown that the gate oxide quality is improved by lowering the active border trap density for both approaches. At the same time, a detailed analysis of the frequency exponent of the flicker noise spectra reveals that in the case of the SF6-plasma, the reduction of the active border trap density occurs more efficiently deeper in the high-k layer, while the opposite holds for the annealed devices, i.e., a lower trap density is found closer to the interfacial SiO2 layer.