Function‐level module sharing techniques in high‐level synthesis-Reference-Cited by-同舟云学术

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Function‐level module sharing techniques in high‐level synthesis

Published:2020-08 Issue:4 Volume:42 Page:527-533
ISSN:1225-6463
Container-title:ETRI Journal
language:en
Short-container-title:ETRI Journal

Author:

Nishikawa Hiroki¹^ORCID,Shirane Kenta¹,Nozaki Ryohei¹,Taniguchi Ittetsu²,Tomiyama Hiroyuki¹

Affiliation:

1. Graduate School of Science and Engineering Ritsumeikan University Shiga Japan

2. Graduate School of Information Science and Technology Osaka University Osaka Japan

Funder

Japan Society for the Promotion of Science

Publisher

Wiley

Subject

Electrical and Electronic Engineering,General Computer Science,Electronic, Optical and Magnetic Materials

Link

https://onlinelibrary.wiley.com/doi/pdf/10.4218/etrij.2020-0107

Reference16 articles.

1. High — Level Synthesis

2. The high-level synthesis of digital systems

3. Function Call Optimization for Efficient Behavioral Synthesis

4. Partitioning of Behavioral Descriptions with Exploiting Function-Level Parallelism

5. FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Learning from the Past: Efficient High-level Synthesis Design Space Exploration for FPGAs;ACM Transactions on Design Automation of Electronic Systems;2022-02-12

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