Si‐core/SiGe‐shell channel nanowire FET for sub‐10‐nm logic technology in the THz regime-Reference-Cited by-同舟云学术

Si‐core/SiGe‐shell channel nanowire FET for sub‐10‐nm logic technology in the THz regime

Published:2019-10-14 Issue:6 Volume:41 Page:829-837
ISSN:1225-6463
Container-title:ETRI Journal
language:en
Short-container-title:ETRI Journal

Author:

Yu Eunseon¹^ORCID,Son Baegmo²,Kam Byungmin²,Joh Yong Sang²,Park Sangjoon²,Lee Won‐Jun³,Jung Jongwan³^ORCID,Cho Seongjae⁴^ORCID

Affiliation:

1. Department of Electrical and Computer Engineering Purdue University West Lafayette, IN USA

2. Wonik IPS Pyeongtaek Rep. of Korea

3. Department of Nanotechnology and Advanced Materials Engineering Sejong University Seoul Rep. of Korea

4. Department of Electronics Engineering and the Graduate School of IT Convergence Engineering Gachon University Seongnam Rep. of Korea

Funder

Ministry of Trade, Industry and Energy

Ministry of Science, ICT and Future Planning

Publisher

Wiley

Subject

Electrical and Electronic Engineering,General Computer Science,Electronic, Optical and Magnetic Materials

Link

https://onlinelibrary.wiley.com/doi/pdf/10.4218/etrij.2018-0281

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4. Investigation and Optimization of Double-gate MPI 1T DRAM with Gate-induced Drain Leakage Operation

5. Design of poly‐si junctionless fin‐channel FET with quantum‐mechanical drift‐diffusion models for sub‐10‐nm technology nodes;Lee J.;IEEE Trans. Electron Devices.,2016

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