A High-Speed CMOS OP Amplifier with a Dynamic Switching Bias Circuit

Author:

Wakaumi Hiroo1

Affiliation:

1. Division of Electronics and Information Engineering, Tokyo Metropolitan College of Industrial Technology

Publisher

Informa UK Limited

Reference13 articles.

1. [1] S. Nakagawa, H. Terane, T. Matsumura, H. Segawa, M. Yoshimoto, H. Shinohara, S. Kato, M. Hatanaka, H. Ohira, Y. Kato, M. Iwatsuki, K. Tabuchi, and Y. Horiba: A 24-b 50-ns Digital Image Signal Processor, IEEE J. Solid-State Circuits, Vol. 25, No. 6, pp. 1484-1493, Dec. 1990.

2. [2] T. Minami, R. Kasai, H. Yamauchi, Y. Tashiro, J. Takahashi, and S. Date: A 300-MOPS Video Signal Processor with a Parallel Architecture, IEEE J. Solid-State Circuits, Vol. 26. No. 12, pp. 1868-1875, Dec. 1991.

3. [3] J.T. Caves, M.A. Copeland, C.F. Rahim, and S.D. Rosenbaum: Sampled Analog Filtering Using Switched Capacitors as Resistor Equivalents, IEEE J. Solid-State Circuits, Vol. SC-12, No. 6, pp. 592-599, Dec. 1977.

4. [4] P.V.A. Mohan, V. Ramachandran, and M.N.S. Swamy: Switched Capacitor Filters: Theory, Analysis and Design, p. 472, Prentice Hall, 1995.

5. [5] M. Takebe, J. Iwata, N. Takahashi, and H. Kunieda: Switched Capacitor Circuits, Gendai Kogakusha, 2005 (in Japanese).

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1. A SDDG FinFET Based Op Amp with DSB Circuit;Proceedings of the Second International Conference on Information and Communication Technology for Competitive Strategies - ICTCS '16;2016

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