The design of a low-power 4-bit barrel shifter for a current steering DAC using optimized multiplexers in 65 nm technology

Abstract

CMOS technology scaling has paved the way for a faster and more complex integration. Low-power techniques have become crucial because of the demand for low power consumption and high speed. The main objective of this research is to utilize low-power techniques to implement a 4-bit barrel shifter that can shift or rotate data using any number of bits within a single cycle. Gate Diffusion Input (GDI), modified GDI, and full-swing GDI logic have been employed to implement a 2:1 multiplexer, among which the modified GDI-based multiplexer stands out because of its minimal power consumption. Consequently, a 4-bit barrel shifter is implemented using a modified GDI-based multiplier. All designs and simulations were performed using the Cadence Virtuoso tool in UMC 65 nm technology. This technology enables the accurate analysis and assessment of the designed barrel shifter, considering the characteristics and limitations of the 65 nm process. This study focused on leveraging low-power techniques to implement a 4-bit barrel shifter to address the industry's demand for power-efficient solutions. The modified GDI-based multiplexer is a promising choice that provides a balance between low power consumption and high performance. The use of advanced design tools and selected technology further ensures accurate simulations and evaluations of the proposed design.