Author:
Wen Mei,Huang Da-fei,Xun Chang-qing,Chen Dong
Funder
National Natural Science Foundation of China
National High-Tech R&D Program (863 Program) of China
Publisher
Zhejiang University Press
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing
Reference33 articles.
1. Allen, R., Kennedy, K., 2002. Optimizing Compilers for Modern Architectures: a Dependence-Based Approach. Morgan Kaufmann, San Francisco.
2. Balasundaram, V., Kennedy, K., 1989. A technique for summarizing data access and its use in parallelism enhancing transformations. ACM SIGPLAN Not., 24(7):41–53. [doi:10.1145/74818.74822]
3. Baskaran, M.M., Bondhugula, U., Krishnamoorthy, S., et al., 2008. A compiler framework for optimization of affine loop nests for GPGPUs. Proc. 22nd Annual Int. Conf. on Supercomputing, p.225–234. [doi:10.1145/ 1375527.1375562]
4. Bastoul, C., 2004. Code generation in the polyhedral model is easier than you think. Proc. 13th Int. Conf. on Parallel Architectures and Compilation Techniques, p.7–16. [doi:10.1109/PACT.2004.1342537]
5. Danalis, A., Marin, G., Mc Curdy, C., et al., 2010. The scalable heterogeneous computing (SHOC) benchmark suite. Proc. 3rd Workshop on General-Purpose Computation on Graphics Processing Units, p.63–74. [doi:10. 1145/1735688.1735702]