Understanding advanced DRAM edge placement error budget and opportunities for control-Reference-Cited by-同舟云学术

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Understanding advanced DRAM edge placement error budget and opportunities for control

Published:2020-03-20 Issue: Volume: Page:
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Container-title:Metrology, Inspection, and Process Control for Microlithography XXXIV
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Author:

Jeong Jaeseung,Lee Jinho,Kim Jinsun,Yea Sunyoung,Hwang Chan,Lee Seung Yoon,Lee Jeongjin,Park Joon-Soo,Nikolsky Peter,Park Daniel,Corradi Antonio,Yu Hyun-Woo,Jung Sun Wook,Ovchinnikov Denis,Timoshkov Vadim,de la Fuente Valentin Isabel,Yin Yuxiang,Padhye Kaustubh,Tel Wim,Dillen Harm,Thuijs Koen,Slotboom Daan,Wang Miao,Su Rhys,Kea Marc,Lee Jin-Woo,Sung Yun-A,Kim Sang-Uk,Song Young-Hoon,Lee James,Kwon Oh-Sung

Publisher

SPIE

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. 极紫外光刻中的边缘放置误差控制;Chinese Journal of Lasers;2024

2. Improvements in the measurement of local critical dimension uniformity for holes and pillars;International Conference on Extreme Ultraviolet Lithography 2023;2023-11-21

3. Assessing neutral transport mechanisms in aspect ratio dependent etching by means of experiments and multiscale plasma modeling;Plasma Sources Science and Technology;2023-06-01

4. Overlay and edge placement error metrology in the era of stochastics;Metrology, Inspection, and Process Control XXXVII;2023-04-27

5. On-product overlay solutions for DUV and EUV mix-scanner usage in an EPE-driven patterning world;Optical and EUV Nanolithography XXXV;2022-05-26

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