1. BEOL variability and impact on RC extraction;Nagaraj,2005
2. Fast generation of statistically-based worst-case modeling of on-chip interconnect;Chang,1997
3. Double patterning for 32nm and below: an update;Finders,2008
4. Is overlay error more important than interconnect variations;Jeong,2009
5. Double patterning: solutions in parasitic extraction;Petranovic,2013