1. Experimental Investigation of the Impact of LWR on Sub-100-nm Device Performance
2. Fractal dimension of line width roughness and its effects on transistor performance;Constantoudis,2008
3. Effect of line-edge roughness (LER) and line-width roughness (LWR) on sub-100-nm device performance;Lee,2004
4. Impact of line width roughness on device performance;Lorusso,2006
5. Characterization of line-edge roughness in resist patterns and estimations of its effect on device performance;Yamaguchi,2003