Cost analysis of device options and scaling boosters below the A14 technology node-Reference-Cited by-同舟云学术

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Cost analysis of device options and scaling boosters below the A14 technology node

Published:2023-04-28 Issue: Volume: Page:
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Container-title:DTCO and Computational Patterning II
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Author:

Mirabelli Gioele,Vandooren Anne,Roda Neve Cesar,Gonzalez Victor Vega,Mertens Hans,Farokhnejad Anita,Schuddinck Pieter,Murdoch Gayle,Salahuddin Shairfe Muhammad,Zografos Odysseas,Ragnarsson Lars,Weckx Pieter,Tokei Zsolt,Hellings Geert,Ryckaert Julien

Publisher

SPIE

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Investigation of die-cost scaling scenarios in future technologies;DTCO and Computational Patterning III;2024-04-10

2. Complementary Field-Effect Transistors: From Silicon to 2D Materials;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24

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