Patterning challenges for beyond 3nm logic devices: example of an interconnected magnetic tunnel junction-Reference-Cited by-同舟云学术

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Patterning challenges for beyond 3nm logic devices: example of an interconnected magnetic tunnel junction

Published:2019-03-26 Issue: Volume: Page:
ISSN:
Container-title:Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019
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Author:

Thiam Ndeye Arame,Wan Danny,Souriau Laurent,Babaei Gavan Khashayar,Rassoul Nouredine,Swerts Johan,Couet Sebastien,Raymenants Eline,Jussot Julien,Trivkovic Darko,Ercken monique,Wilson Christopher J.,Radu Iuliana P.

Publisher

SPIE

Reference5 articles.

1. Proposal of a Spin Torque Majority Gate Logic

2. Fabrication of magnetic tunnel junctions connected through a continuous free layer to enable spin logic devices

3. Interconnected magnetic tunnel junctions for spin-logic applications

4. Scaled spintronic logic device based on domain wall motion in magnetically interconnected tunnel junctions

5. Operating conditions and stability of spin torque majority gates: Analytical understanding and numerical evidence

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