High performance and low area interconnect structure based on AXI-Reference-Cited by-同舟云学术

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High performance and low area interconnect structure based on AXI

Published:2024-01-16 Issue: Volume: Page:
ISSN:
Container-title:Workshop on Electronics Communication Engineering (WECE 2023)
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Author:

Zhang Yahan,Cai Gang,Huang Zhihong

Publisher

SPIE

Reference21 articles.

1. The Discipline of Embedded Systems Design

2. Multiprocessor Systems-on-Chips;Jerraya,2004

3. Performance analysis of on-chip communication architecture in MPSoC

4. Networks on chips: a new SoC paradigm

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design and Simulation of AXI4 Stream Interconnect Using Verilog;2024 IEEE International Conference on Information Technology, Electronics and Intelligent Communication Systems (ICITEICS);2024-06-28

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