Fault Detection and Analysis in SRAM through Self Refreshing Operation

Abstract

Numerous soft faults in SRAM memory emerge as technological innovations scales down, resulting in single and several cell upsets. The increased use of transistors in space applications has rendered semiconductor devices more vulnerable to soft errors caused by harm from radiation. A single event upset (SEU) is occurring whenever a soft error produces a tiny bit flipped in a storage device. Because SEU faults affect system performance, they must be addressed as soon as possible. Error-correcting codes, like the method known as (7,4) hamming codes, were devised and their decoding and encoding procedures were verified. It also used to detect single errors that can be fixed. It also helps detect double errors, SECDED however repair of double errors is tough. The decoding and encoding techniques of these approaches were investigated, and all computational findings had been verified and executed in a Xilinx NEXYS 4 DDR FPGA board.