Reduction of Output Impedance of Buck Converter with Genetic Algorithm

Author:

ASADİ Farzin1

Affiliation:

1. MALTEPE ÜNİVERSİTESİ

Abstract

This paper introduces a technique to reduce the output impedance in the PWM buck converters with voltage-mode control (VMC) without requiring low Equivalent Series Resistance (ESR) output capacitors. Proposed technique uses the infinity norm ( ) to convert the problem into an optimization problem. Obtained optimization problem is solved with the aid of Genetic Algorithm (GA). The proposed technique is applied to a sample buck converter operating in Continuous Conduction Mode (CCM). Simulink simulation is used to test the suggested method. Simulation results showed a considerable decrease in the low frequency region of output impedance. Such a decrease in output impedance is very desired for low voltage high current loads like computer CPU’s.

Publisher

Balkan Journal of Electrical & Computer Engineering (BAJECE)

Subject

General Medicine

Reference20 articles.

1. [1] E. Joard, J. Villarejo, F. Soto, and J. Muro, “Effect of the Output Impedance in Multiphase Active Clamp Buck Converters,” IEEE Trans. Ind. Electron., vol. 55, no. 9, pp. 3231-3238, Sep. 2008.

2. [2] D. Goder and W. R. Pelletier, “V2 architecture provides ultra-fast transient response in switch mode power supplies,” in Proc. HFPC, 1996, pp. 16-23.

3. [3] J. Xu, X. Cao, and Q. Luo, “The effects of control techniques on the transient response of switching DC-DC converters,” in Proc. IEEE PEDS, 1999, pp. 794-796

4. [4] P. Wong, F. C. Lee, X. Zhou, and J. Chen, “VRM transient study and output filter design for future processors,” in Proc. IEEE IECON, 1998, pp. 410-415.

5. [5] D. Briggs, R. Martinez, R. Miftakhutdinov, and D. Skelton, “A fast, efficient synchronous buck controller for microprocessor power supplies,” in Proc. HFPC, 1998, pp. 170-176.

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