MN-ADC based on high-reliable 2T2R synapse structure

Abstract

With the ever-growing demands for sampling rate, conversion resolution, as well as lower energy consumption, the memristor-based neuromorphic analog-to-digital converters (MN-ADC) becomes one of the most potential approaches to break the bottleneck for traditional ADCs. However, the online trainable MN-ADCs are not designed to be easily integrated into the 1T1R crossbar array, meanwhile suffering from the device non-idealities, which makes it difficult to realize high-speed and accurate conversion. To overcome these issues, this paper proposes a high-reliable 2T2R synaptic structure. And through the dedicated structure, we construct a 4-bit MN-ADC that allows for alternate conversions and online adjustments in a single clock period, which can significantly mitigate the effects of device non-idealities on dynamic performance. More importantly, this structure can be perfectly compatible with 1T1R crossbar arrays. Simulation results demonstrate the validity of the proposed MN-ADC, which achieves the ENOB of 3.77 bits, the INL of 0.16 LSB, and the DNL of 0.07 LSB.