Series resistance and gate leakage correction for improved border trap analysis of Al2O3/InGaAs gate stacks-Reference-Cited by-同舟云学术

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Series resistance and gate leakage correction for improved border trap analysis of Al2O3/InGaAs gate stacks

Published:2017-09-07 Issue:9 Volume:122 Page:094503
ISSN:0021-8979
Container-title:Journal of Applied Physics
language:en
Short-container-title:Journal of Applied Physics

Author:

Tang K.¹,Scheuermann A. G.¹,Zhang L.²^ORCID,McIntyre P. C.¹

Affiliation:

1. Department of Materials Science and Engineering, Stanford University, Stanford, California 94305, USA

2. Department of Electrical Engineering, Stanford University, Stanford, California 94305, USA

Funder

Stanford Initiative in Nanoscale Materials and Processes

Semiconductor Research Corporation (SRC)

Publisher

AIP Publishing

Subject

General Physics and Astronomy

Link

http://aip.scitation.org/doi/pdf/10.1063/1.5000359

Reference12 articles.

1. High-Performance Inverted $\hbox{In}_{0.53} \hbox{Ga}_{0.47}\hbox{As}$ MOSHEMTs on a GaAs Substrate With Regrown Source/Drain by MOCVD

2. Electrical modeling of compound semiconductor interface for FET device assessment

3. Beyond interface: The impact of oxide border traps on InGaAs and Ge n-MOSFETs

4. A Distributed Model for Border Traps in $\hbox{Al}_{2} \hbox{O}_{3}-\hbox{InGaAs}$ MOS Devices

5. A model for capacitance reconstruction from measured lossy MOS capacitance voltage characteristics

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