Author:
Tulasi Sanath Kumar,Inthiyaz Syed,Prasad G. R. K.,Kumar M. Siva
Reference21 articles.
1. Dual-edge triggered storage elements and clocking strategy for low-power systems
2. Analysis of power dissipation in double edge-triggered flip-flops
3. Inthiyaz, S., Tulasi, S.K., Jayanthi, R.S.L., Sahitya, C., Jyothi, C. “Design of bi-trigger sram using schmitt trigger for low power 13t cmos application”, International Journal of Scientific and Technology Research 8(12), pp. 1466–1471.
4. Siva Kumar, M., Noorbasha, F., Inthiyaz, S., Jameela, M., Sandhya, A., Imran, M., Tulasi, S.K. “Low power carry look-ahead adder using transmission gate multiplexer”, International Journal of Emerging Trends in Engineering Research 8(1), pp. 13–17
5. Kumar, S., Inthiyaz, S., Pavani, D., Naga Kishore, G., Harish, G.V., Navya Sri, S.V., Swathi, D., Tulasi, S.K. “Implementation of recursive formulation for parallel self-timed adder using verlog logic”, International Journal of Emerging Trends in Engineering Research 8(2), pp. 355–360.