Random telegraph noise in nanometer-scale CMOS transistors exposed to ionizing radiation
Author:
Affiliation:
1. Department of Information Engineering, University of Padova 1 , Padova 35131, Italy
2. Department of Electrical and Computer Engineering, Vanderbilt University 2 , Nashville, Tennessee 37235, USA
Abstract
Publisher
AIP Publishing
Subject
Physics and Astronomy (miscellaneous)
Link
https://pubs.aip.org/aip/apl/article-pdf/doi/10.1063/5.0147587/18258290/173508_1_5.0147587.pdf
Reference67 articles.
1. Border traps: Issues for MOS radiation response and long-term reliability
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3. Submicron CMOS technologies for low-noise analog front-end circuits
4. Effects of Total Dose Irradiation on the Gate-Voltage Dependence of the $\hbox{1}/f$ Noise of nMOS and pMOS Transistors
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