Optimizing interface properties of HfO2/Si0.73Ge0.27 gate stacks through sulfur passivation and post-deposition annealing-Reference-Cited by-同舟云学术

Optimizing interface properties of HfO2/Si0.73Ge0.27 gate stacks through sulfur passivation and post-deposition annealing

Published:2024-03-27 Issue:12 Volume:135 Page:
ISSN:0021-8979
Container-title:Journal of Applied Physics
language:en
Short-container-title:

Author:

Chen Zhengyang¹^ORCID,Lan Zhangsheng¹^ORCID,Lin Yiran¹^ORCID,Nishimura Tomonori²^ORCID,Lee Choonghyun¹,Zhao Yi¹³⁴^ORCID

Affiliation:

1. College of Electronic Engineering and Information Science, Zhejiang University 1 , Hangzhou 310027, China

2. Department of Materials Engineering, The University of Tokyo 2 , Tokyo 113-8656, Japan

3. State Key Laboratory of Silicon and Advanced Semiconductor Materials, Zhejiang University 3 , Hangzhou 310027, China

4. International Joint Innovation Center, Zhejiang University 4 , Haining 314400, China

Abstract

This paper presents a comprehensive exploration of low interface trap density (Dit) in HfO2/Si0.73Ge0.27 metal-oxide semiconductor (MOS) capacitors achieved through sulfur passivation and post-deposition annealing (PDA). Our investigation revealed that devices subjected to sulfur passivation and PDA exhibit noteworthy reductions in Dit and hysteresis. Specifically, a low Dit value of 1.2 × 1011 eV−1 cm−2 has been achieved at Ei–0.1 eV for the SiGe MOS device. The observed enhancement in interface properties can be attributed to two key factors: the reduction of the GeOx concentration in the interfacial layer (IL) by sulfur passivation on the SiGe surface and the IL densification with stoichiometric oxygen during PDA.

Funder

National Key Research and Development Program of China

"Pioneer" and "Leading Goose" R&D of Zhejiang Province

Publisher

AIP Publishing

Link

https://pubs.aip.org/aip/jap/article-pdf/doi/10.1063/5.0195430/19854654/125704_1_5.0195430.pdf

Reference40 articles.