Bit upset and performance degradation of NAND flash memory induced by total ionizing dose effects

Abstract

In order to develop the shift model of threshold voltage distribution of the memory array in a radiation environment based on the bit upset test results of NAND Flash and study the coupling effect caused by the simultaneous performance degradation of NAND Flash fundamental modules, the experimental research on the total dose effect of two types of SLC NAND Flash memories, with a feature size of 25 nm and storage capacities of 8 and 32 Gb, respectively, was carried out. When irradiated, the partial memory array and peripheral circuit were shielded. An analytical shift model of threshold voltage distribution was developed. The model parameters are extracted from the experimental data of the 32 Gb devices, and the model and the data were in good agreement. The normalized threshold voltage distributions of the memory array at different total doses were obtained through this model, which showed the changing process of the threshold voltage distribution of the memory array more intuitively and quantitatively. The experimental results also show that the reduced voltage applied to the word line of the memory array generated by the charge pump is the cause of the performance degradation of NAND Flash. The factors that reduce the output voltage of the charge pump are the leakage current of the charge pump itself, the global leakage, the local leakage, and their coupling. Reducing the leakage of NAND Flash peripheral circuits, improving the driver of the charge pumps, and designing a data refresh strategy according to the estimation of the bit upset ratio will help improve the data retention capability in the radiation environment.