In-depth profiling of electron trap states in silicon-on-insulator layers and local mechanical stress near the silicon-on-insulator/buried oxide interface in separation-by-implanted-oxygen wafers
Author:
Publisher
AIP Publishing
Subject
General Physics and Astronomy
Link
http://aip.scitation.org/doi/pdf/10.1063/1.3520660
Reference25 articles.
1. Silicon-on-Insulator Technology: Materials to VLSI
2. Subthreshold slope of thin-film SOI MOSFET's
3. Subfemtojoule deep submicrometer-gate CMOS built in ultra-thin Si film on SIMOX substrates
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1. Modeling of Drain Electric Flux Passing Through the BOX Layer in SoI MOSFETs—Part I: Preparation for Modeling Based on Conformal Mapping;IEEE Transactions on Electron Devices;2014-09
2. Effect of trapped electrons in ultrathin SiO2 on the two-state inversion capacitance at varied frequencies of metal-oxide-semiconductor capacitor;Applied Physics A;2014-03-26
3. Quantitative Extraction of Electric Flux in the Buried-Oxide Layer and Investigation of Its Effects on MOSFET Characteristics;IEEE Transactions on Electron Devices;2013-12
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