Characterization and role of deep traps on the radio frequency performances of high resistivity substrates-Reference-Cited by-同舟云学术

Characterization and role of deep traps on the radio frequency performances of high resistivity substrates

Published:2021-06-01 Issue:21 Volume:129 Page:215701
ISSN:0021-8979
Container-title:Journal of Applied Physics
language:en
Short-container-title:Journal of Applied Physics

Author:

Vandermolen Eric¹²^ORCID,Ferrandis Philippe³^ORCID,Allibert Frédéric²^ORCID,Nabet Massinissa⁴^ORCID,Rack Martin⁴^ORCID,Raskin Jean-Pierre⁴^ORCID,Cassé Mikaël¹^ORCID

Affiliation:

1. CEA, LETI, Univ. Grenoble Alpes, 38000 Grenoble, France

2. SOITEC, Parc technologique des fontaines, 38190 Bernin, France

3. Université de Toulon, Univ. Grenoble Alpes, CNRS, Institut Néel, 38000 Grenoble, France

4. ICTEAM, Université catholique de Louvain, 1348 Louvain-la-Neuve, Belgium

Funder

Association Nationale de la Recherche et de la Technologie

Publisher

AIP Publishing

Subject

General Physics and Astronomy

Link

https://aip.scitation.org/doi/pdf/10.1063/5.0045306

Reference43 articles.

1. Low-loss CPW lines on surface stabilized high-resistivity silicon

2. New substrate passivation method dedicated to HR SOI wafer fabrication with increased substrate resistivity

3. C. Roda Neve, K. Ben Ali, C. Malaquin, F. Allibert, E. Desbonnets, I. Bertrand, W. Van Den Daele, and J.P. Raskin, in 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (IEEE, 2013), pp. 15–17.

4. L. Zhu, S. Liu, F. Allibert, E. Desbonnets, I. Radu, X. Zhu, and Y. Lu, in 2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) (IEEE, 2016), pp. 1–2.

5. RF Performance of SOI CMOS Technology on Commercial 200-mm Enhanced Signal Integrity High Resistivity SOI Substrate