1. M. Chmiel and E. Hrynkiewicz, The dynamic properties investigation of the PLC CPU implemented in FPGA, Programmable Devices and Embedded Systems, PDES’12, May 23-25, Czech Republic, 2012, pp. 151–156
2. M. Chmiel, On reducinq PLC response time, Bulletin Polish Academy of Sciences, Vol. 5, (3), 2006, pp. 229–238
3. FPGA BASED OPC UA EMBEDDED INDUSTRIAL DATA SERVER IMPLEMENTATION
4. P. Czekalski, K. Tokarz and B. Pochopień, A Modern Approach to the Asynchronous Sequential Circuit Synthesis, Theoretical and Applied Informatics, Vol. 26, No. 1-2, 2014, pp. 25–37
5. M. Kobylecki and D. Kania, Dwutaktowa realizacja sterowania bitowego, Przegląd Elektrotechniczny, Vol. 90, No 9, 2014, pp. 240–245