An 18-ps TDC using timing adjustment and bin realignment methods in a Cyclone-IV FPGA
Author:
Affiliation:
1. Research Center of High Speed Machine Vision of Hefei i-Tek OptoElectronics Co., Ltd., Hefei, Anhui 230088, China
2. School of Instrument Science and Opto-Electronics Engineering, Hefei University of Technology, Hefei, Anhui 230009, China
Funder
National Natural Science Foundation of China
Publisher
AIP Publishing
Subject
Instrumentation
Link
http://aip.scitation.org/doi/pdf/10.1063/1.5008610
Reference22 articles.
1. Field-programmable-gate-array-based time-to-digital converter with 200-ps resolution
2. Single-chip interpolating time counter with 200-ps resolution and 43-s range
3. Review of methods for time interval measurements with picosecond resolution
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