Design of high speed hybrid full adder using reversible logic gates
Author:
Publisher
AIP Publishing
Link
http://aip.scitation.org/doi/pdf/10.1063/5.0196570
Reference10 articles.
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4. S. Ahmed, X. Zou, and H. Fariborzi, ”A Cascadable Reconfigurable Mi-cro electromechanical Resonator Logic Gate,” in 2020 Joint Conference of the IEEE International Frequency Control Symposium and Interna-tional Symposium on Applications of Ferroelectrics (IFCS-ISAF), 2020,pp. 1–3.
5. BRENDLER, L. H. et al. Multi-level design influences on robustness evaluation of 7nm finfet technology. IEEE Transactions on Circuits and Systems I: Regular Papers,IEEE, 2019.
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