Reduced hardware costs with software and hardware implementation of digital methods multistage discrete Fourier transform on programmable logic devices

Abstract

Let us consider questions, which are connected to the research of terms of hardware and software implementation digital signal processing (DSP) methods. Theoretical basis of this research are methods of non-recursive difference of digital filtration with integer difference coefficients different orders of difference and methods of multistage discrete Fourier transform (DFT) based on such digital filtration. The purpose of the study is the research and formalization of necessary and sufficient condition of lowering hardware costs in hardware and software implementation of methods multistage DFT of digital signals on programmable logic devices (PLD). For reaching the research goal there are used methods of direct search and comparative analysis of results of such realization of methods of multi-stage DFT of digital multi-band signals, while filtering these signals, which are based on their non-recursive difference digital filtering with integer difference values coefficients and different orders of magnitude of difference. There are described abilities and specialties of PLD, which are built using architecture of a coarse-grained or fine-grained architecture or using combined architecture, which connects the convenience of implementing digital processing algorithms signals on the basis of tables of code conversion and reconfigurable memory modules. It is clear that a necessary and sufficient condition of lowering hardware costs in terms of hardware and software realization of methods for multi-stage DFT of digital signals on PLD is the triviality of meanings of integer difference coefficients of a non-recursive difference digital high difference orders’ filtration, which ensure this information. There is mentioned a formula, which allows making such condition. The practical significance of the research results consists of defining the necessary and sufficient condition of lowering hardware costs in terms of hardware and software implementation on PLD methods of multi-stage DFT signals based on their non-recursive digital difference filtering with integer values differential coefficients of various orders of magnitude difference. The novelty of research results lies in formalization of this condition. The reliability of the research results confirms their compliance with the results of well-known developments of DSP methods.