Design and Implementation of a Modified Boost Topology with High Voltage Ratio and Efficiency Besides the Lower Semiconductors Stresses-Reference-Cited by-同舟云学术

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Design and Implementation of a Modified Boost Topology with High Voltage Ratio and Efficiency Besides the Lower Semiconductors Stresses

Published:2022-03-01 Issue:1 Volume:1 Page:75-84
ISSN:2821-0190
Container-title:Research and Technology in the Electrical Industry
language:en
Short-container-title:IJRTEI

Author:

Sharifi Shahrivar Reza,Gholizadeh Hossein,Siadatan Ali,Afjei Seyed Ebrahim

Publisher

CMV Verlag

Link

https://ijrtei.sbu.ac.ir/article_102353_7f457f233b78bd6fb69a4b3c987fa549.pdf

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An Improved Cascaded Boost Converter with an Ultra-High Voltage Gain Suitable for Dielectric Quality Tests;Energies;2024-08-05

2. New Enhanced Family of QBC Topologies: Mitigating Capacitor Stress and Increasing Voltage Gain;2024 IEEE 8th Energy Conference (ENERGYCON);2024-03-04

3. A Family of Improved Boost Converters with application of High Intensity Discharge Lightning;2023 13th Smart Grid Conference (SGC);2023-12-05

4. A New Non-Isolated High-Gain Single-Switch DC-DC Converter with Continuous Input Current;IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society;2023-10-16

5. Reliability and Fault-Tolerance Assessment of PMSM Drive for Electric Aircraft Applications;2023 IEEE International Electric Machines & Drives Conference (IEMDC);2023-05-15

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