NUMA Computing with Hardware and Software Co-Support on Configurable Emulated Shared Memory Architectures

Author:

Forsell Martti1,Hansson Erik2,Kessler Christoph2,Mäkelä Jari-Matti3,Leppänen Ville3

Affiliation:

1. VTT Technical Research Centre of Finland

2. Linköping University

3. University of Turku

Publisher

IJNC Editorial Committee

Reference24 articles.

1. [1] M. Dietzfelbinger, A. Karlin, K. Mehlhorn, F. Meyer auf der Heide, H. Rohnert, and R.E. Tarjan. Dynamic Perfect Hashing: Upper and Lower Bounds. SIAM Journal on Computing, 23(4):738 - 761, August 1994.

2. [2] M. Forsell. A Scalable High-Performance Computing Solution for Network on Chips. IEEE Micro, 22(5 (September-October)):46–55, 2002.

3. [3] M. Forsell. Advanced simulation environment for shared memory network-on-chips. In Proceedings of the 20th IEEE NORCHIP Conference, pages 31–36, Copenhagen, Denmark, November 2002.

4. [4] M. Forsell. Compiling thread-level parallel programs with a C-compiler. In Proceedings of the IV Jornadas sobre Programacion y Lenguajes, pages 215–226, Malaga, Spain, November 2004.

5. [5] M. Forsell. E - A Language for Thread-Level Parallel Programming on Synchronous Shared Memory NOCs. WSEAS Transactions on Computers, 3(3):807–812, 2004.

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