A Memory-Efficient Implementation of a Plasmonics Simulation Application on SX-ACE

Author:

Mathur Raghunandan1,Matsuoka Hiroshi2,Watanabe Osamu2,Musa Akihiro2,Egawa Ryusuke2,Kobayashi Hiroaki2

Affiliation:

1. NEC Technologies India

2. Tohoku University

Publisher

IJNC Editorial Committee

Reference29 articles.

1. [1] J. Dongarra, and A. van der Steen,. High-performance computing systems: Status and outlook. Acta Numerica, 21:379-474, May 2012.

2. [2] P. M. Kogge, and T. J. Dysart. Using the TOP500 to trace and project technology and architecture trends. In 2011 International Conference for High Performance Computing, Networking, Storage and Analysis (SC), pages 1-11, Nov 2011.

3. [3] R.Egawa, S.Momose, K.Komatsu, Y.Isobe, A.Musa, H.Takizawa, and H.Kobayashi. Early evaluation of the sx-ace processor. The poster presentation at The International Conference for High Performance Computing, Networking, Storage and Analysis (SC14), 2014.

4. [4] H. Meuer, J. Dongarra, E. Strohmaier, and H. Simon. TOP 500 Lists June 2016. TOP 500 Supercomputer Sites. http://top500.org.

5. [5] Application Working Group. Computational Science Roadmap - Overview. on Feasibility Study on Future HPC Infrastructures, http://hpci-aplfs.aics.riken.jp/document/roadmap/roadmap_e_1405.pdf, May 2014.

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