GPU-accelerated Exhaustive Verification of the Collatz Conjecture

Author:

Honda Takumi1,Ito Yasuaki1,Nakano Koji1

Affiliation:

1. Hiroshima University

Publisher

IJNC Editorial Committee

Reference20 articles.

1. [1] BOINC Collatz project. http://boinc.thesonntags.com/collatz/.

2. [2] FengWei An and Koji Nakano. An architecture for verifying Collatz conjecture using an FPGA. In Proc. of the International Conference on Applications and Principles of Information Science, pages 375-378, 2009.

3. [3] Javier Diaz, Camelia Muñoz-Caro, and Alfonso Niño. A survey of parallel programming models and tools in the multi and many-core era. IEEE Transactions on Parallel and Distributed Systems, 23(8):1369-1386, August 2012.

4. [4] Takumi Honda, Yasuaki Ito, and Koji Nakano. GPU-accelerated verification of the Collatz conjecture. In Proc. of International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP, LNCS 8630), pages 483-496, 2014.

5. [5] Shuichi Ichikawa and Naohiro Kobayashi. Preliminary study of custom computing hardware for the 3x+1 problem. In Proc. of IEEE TENCON 2004, pages 387-390, 2004.

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