Author:
Yang Chengen,Emre Yunus,Cao Yu,Chakrabarti Chaitali
Publisher
Springer Science and Business Media LLC
Reference32 articles.
1. Lee BC, Ipek E, Mutlu O, Burger D: Architecting phase change memory as a scalable DRAM alternative. International Symposium on Computer Architecture 2009, pp. 1-12.
2. Wu X, Li J, Zhang L, Speight E, Rajamony R, Xie Y: Hybrid cache architecture with disparate memory technologies. In International Symposium on Computer Architecture. (Austin, Texas, USA, 2009); pp. 34-45.
3. Burr GW, Breitwisch MJ, Franceschini M, Garetto D, Gopalakrishnan K, Jackson B, Kurdi B, Lam C, Lastras LA, Padilla A, Rajendran B, Raoux S, Shenoy RS: Phase change memory technology. J Vac Sci Technol B 2010, 28(2):223-262. 10.1116/1.3301579
4. Philip Wong HS, Raoux S, Kim S, Liang J, Reifenberg JP, Rajendran B, Asheghi M, Goodson KE: Phase change memory. Proc IEEE 2010, 98: 2201-2227.
5. Kawahara T, Takemura R, Miura K, Hayakawa J, Ikeda S, Lee Y, Sasaki R, Goto Y, Ito K, Meguro I, Matsukura F, Takahashi H, Matsuoka H, Ohno H: 2 Mb SPRAM (spin-transfer torque RAM) with bit-by-bit bi-directional current write and parallelizing-direction current read. IEEE J Solid State Circuits 2008, 43(1):109-120.
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