Real-time parallel implementation of Pulse-Doppler radar signal processing chain on a massively parallel machine based on multi-core DSP and Serial RapidIO interconnect

Author:

Klilou Abdessamad,Belkouch Said,Elleaume Philippe,Le Gall Philippe,Bourzeix François,Hassani Moha M'Rabet

Publisher

Springer Science and Business Media LLC

Reference35 articles.

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3. Bueno D, Conger C, Leko A, Troxel I, George AD: Virtual prototyping and performance analysis of RapidIO-based system architectures for space-based radar. In Eighth Annual Workshop on High-Performance Embedded Computing (HPEC). Lexington, MA, USA: Massachusetts Institute of Technology Lincoln Laboratory; 2004:28-30.

4. TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor. USA: Texas Instruments; 2014. http://www.ti.com/lit/ds/symlink/tms320c6678.pdf

5. Yang G, Bakos JD: Sparse matrix–vector multiply on the Texas Instruments C6678 digital signal processor. In 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP). Washington, DC, USA: IEEE; 2013:168-174.

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