Integrable emulation of a floating incremental/decremental inverse memristor for memristor bandwidth extension-Reference-Cited by-同舟云学术

Integrable emulation of a floating incremental/decremental inverse memristor for memristor bandwidth extension

Published:2024-02-01 Issue:1 Volume:75 Page:1-7
ISSN:1339-309X
Container-title:Journal of Electrical Engineering
language:en
Short-container-title:

Author:

Bhardwaj Kapil¹,Narayana Ravuri¹,Kalra Dheeraj²,Srivastava Mayank¹

Affiliation:

1. Department of Electronics and Communication Engineering , NIT Jamshedpur , Jamshedpur , , India

2. Department of Electronics and Communication Engineering , GLA University , Mathura , India

Abstract

Abstract The article explores the compact emulation of the inverse memristor through a circuit-based approach. It introduces a floating emulator architecture that incorporates a dual output OTA (Operation Transconductance Amplifier) and DVCC (Differential Voltage Current Conveyor), along with two grounded passive elements, to achieve the emulation of an inverse memristor. The utilization of grounded resistance allows for tunability over the realized behaviour. A key contribution of this research is the novel application of the inverse memristor to extend the operating frequency range of any memristor emulator circuit. Validation of the proposed emulator circuit, in both incremental and decremental modes, along with its application, is conducted using PSPICE-generated simulation results in the 0.18 µm TSMC CMOS technology. Additionally, an inverse memristor emulator configuration employing the IC LM13700 is presented, and its functionality is tested through a breadboard implementation.

Publisher

Walter de Gruyter GmbH

Link

https://www.sciendo.com/pdf/10.2478/jee-2024-0001

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