Developing Efficient Implementations of Shortest Paths and Page Rank Algorithms for NEC SX-Aurora TSUBASA Architecture-Reference-Cited by-同舟云学术

Developing Efficient Implementations of Shortest Paths and Page Rank Algorithms for NEC SX-Aurora TSUBASA Architecture

Published:2019-11 Issue:11 Volume:40 Page:1753-1762
ISSN:1995-0802
Container-title:Lobachevskii Journal of Mathematics
language:en
Short-container-title:Lobachevskii J Math

Author:

Afanasyev I. V.,Voevodin Vad. V.,Voevodin Vl. V.,Komatsu Kazuhiko,Kobayashi Hiroaki

Publisher

Pleiades Publishing Ltd

Subject

General Mathematics

Link

http://link.springer.com/content/pdf/10.1134/S1995080219110039.pdf

Reference15 articles.

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2. Y. Yamada and S. Momose, in Proceedings of the Intenational Symposium on High Performance Chips Hot Chips2018 (2018).

3. R. Egawa, K. Komatsu, S. Momose, Y. Isobe, A. Musa, H. Takizawa, and H. Kobayashi, J. Supercomput. 73, 3948 (2017). https://doi.org/10.1007/s11227-017-1993-y

4. K. Komatsu, R. Egawa, Y. Isobe, R. Ogata, H. Takizawa, and H. Kobayashi, in Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis (SC15) (2015), pp. 1–2.

5. D. Chakrabarti, Y. Zhan, and C. Faloutsos, in Proceedings of the 2004 SIAM International Conference on Data Mining (SIAM, 2004), pp. 442–446.

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