Author:
Katepogu Rajkumar ,G. Umamaheswara Reddy
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference21 articles.
1. Banerjee, K., Souri, S., Kapur, P., and Saraswat, K., 3‑D ICs: A novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration, Proc. IEEE, 2001, vol. 89, no. 5, pp. 602–633. https://doi.org/10.1109/5.929647
2. Loi, G.L., Agrawal, B., Srivastava, N., Lin, Sh.-Ch., Sherwood, T., and Banerjee, K., A thermally-aware performance analyis of vertically-integrated (3-D) processor-memory hierarchy, Proc. 43th Annu. Design Automation Conf., San Francisco, 2006, New York: Association for Computing Machinery, 2006, pp. 991–996. https://doi.org/10.1145/1146909.1147160
3. Majumder, M., Kumari, A., Kaushik, B., and Manhas, S., Signal integrity analysis in carbon nanotube based through-silicon via, Act. Passive Electron. Components, 2014, vol. 2014, p. 524107. https://doi.org/10.1155/2014/524107
4. Xu, Z., Electrical evaluation and modeling of through-strata-vias (TSVs) in three-dimensional (3D) integration, PhD Dissertation, Troy, N.Y.: Rensselaer Polytech. Inst., 2011.
5. Xu, Z. and Lu, J.-Q., High-speed design and broadband modeling of through-strata-vias (TSVs) in 3D integration, IEEE Trans. Components, Packaging Manuf. Technol., 2011, vol. 1, no. 2, pp. 154–162. https://doi.org/10.1109/tcpmt.2010.2101693
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献