Automatic FPGA Placement Configuration for Customer Designs

Author:

Enns V. I.,Gavrilov S. V.,Chochaev R. Zh.

Publisher

Pleiades Publishing Ltd

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference12 articles.

1. Xilinx, Inc. Form 10-K, Investor Relations Xilinx. http://investor.xilinx.com/static-files/13e52459-fd4c-44da-adee-19e463d02ae8. Accessed April 14, 2021.

2. Enns, V., SoC, BMC or FPGA: Choice of digital integrated circuit design, Kompon. Tekhnol., 2018, no. 4 (201), pp. 100–102.

3. 5400TR094 PATsIS, DTs SOYuZ. https://dcsoyuz.ru/products/pais/art/1605 Accessed April 13, 2021.

4. iCE40LM family data sheet, Lattice Semiconductor Corp. http://www.latticesemi.com/view_document? document_id=50152. Accessed April 13, 2021.

5. Frolova, P.I., Chochaev, R.Zh., Ivanova, G.A., and Gavrilov, S.V., Timing-driven placement algorithm based on delay matrix model for reconfigurable system-on-chip, Probl. Razrab. Persp. Mikro- Nanoelektron. Sist., 2020, no. 1, pp. 2–7. https://doi.org/10.31114/2078-7707-2020-1-2-7

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