Author:
Krasnikov G. Ya.,Orlov O. M.
Subject
General Engineering,Condensed Matter Physics,General Materials Science
Reference27 articles.
1. Roadmap’97 (The National Technology Roadmap for Semiconductors-1997) (Semiconductor Industry Association (SIA), San Jose, CA, United States, 1997).
2. S. Yang, S. Ahmed, B. Arcot, et al., “A High Performance 180-nm Generation Logic Technology,” Tech. Dig.-Int. Electron Devices Meet., pp. 197–200 (1998).
3. S. Tyagi, M. Alavi, R. Bigwood, et al., “A 130-nm Generation Logic Technology Featuring 70-nm Transistors, Dual Vt Transistors, and 6 Layers of Cu Interconnects,” Tech. Dig.-Int. Electron Devices Meet., pp. 567–571 (2000).
4. S. Thompson, M. Alavi, R. Arghavani, et al., “An Enhanced 130-nm Generation Logic Technology Featuring 60-nm Transistors Optimized for High Performance and Low Power at 0.7–1.4 V,” Tech. Dig.-Int. Electron Devices Meet., pp. 257–261 (2001).
5. S. Thompson, M. Alavi, M. Hussein, et al., “130-nm Logic Technology Featuring 60-nm Transistors, Low-K Dielectrics, and Cu Interconnects,” Intel Technol. J. 6(2), 5–13 (2002).
Cited by
8 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献